Description Before this test packet was created there was no proper software for measuring vital system parameters such as CPU/Chipset/RAM providing steady and reliable (reproducible) test results and allowing for changing test parameters in a wide range. Vital low-level system characteristics include latency and real RAM bandwidth, average/minimal latency of different cache levels and its associativity, real L1-L2 cache bandwidth and TLB levels specs. Besides, these aspects are usually not paid sufficient attention in product technical documentation (CPU or chipset). Such test suite, which combines a good deal of subsets aimed at measuring objective system characteristics, is a must have for estimating crucial objective platform parameters.
RMMA provides you with the following platform information:
- CPUID info, including CPU vendor, model and core name, family, model and stepping numbers, supported instruction set extensions, cache and TLB features; - Chipset (Northbridge and Southbridge) vendor and model name, AGP features, installed RAM type/size, current RAM timings; - Memory SPD (Serial Presence Detect) info, including module type/size, manufacturer, part number, attributes and timings;
Built-in RMMA microacrhitecture tests let you determine the most important low-level platform characteristics, which include:
- Average and peak real RAM bandwidth; - L1/L2/L3 data cache size and hierarchy (inclusive/exclusive); - Average and minimal/maximal L1/L2/L3 data cache/RAM latency; - L1/L2/L3 data cache associativity; - L1-L2 and L2-L3 data cache bus bandwidth, data arrival delays; - I-ROB (instructions reorder buffer) depth; - L1 instructions cache size (including the "effective" size) and associativity; - Decode efficiency of various simple x86 (ALU/FPU/MMX) instructions; - D-TLB size and associativity (of each level); - I-TLB size and associativity (of each level).
